1. Field of the Invention
This invention relates to a high-frequency amplifier. High-frequency amplifiers are used as power amplifiers for communication systems which transmit and receive high-frequency signals. This invention relates, more particularly, to a high-frequency amplifier with a high power efficiency. The power efficiency is represented by the ratio of a high-frequency output power against the supplied D.C. power.
2. Background Information
A class-F amplifier is formed by adding a harmonic processing circuit to a class-B amplifier to increase power efficiency in a high-frequency amplifier. FIG. 12 shows an operating principle of the class-F amplifier. A FET is used as an active device in the following description, but the same effect is obtained when a bipolar transistor or an electron tube is used. In FIG. 12, the horizontal axis represents time t, the vertical axis drain volta V.sub.d and drain current i.sub.d. The time waveform of the drain voltage V.sub.d is expressed with a broken line while that of the drain current is expressed with a solid line.
When a sine-wave with the fundamental frequency f.sub.0 is inputted at a gate terminal of a FET which operates in class-B, the conduction between the drain and the source changes in a cycle of the frequency f.sub.0. There is no conduction between the drain and the source in the region B in FIG. 12, so the drain voltage V.sub.d has a value other than zero. When there is conduction therebetween, on the other hand, as in the region A of FIG. 12, the drain volta V.sub.d becomes substantially zero. If a load which is matched for the fundamental frequency f.sub.0, e.g. is open for an odd harmonic frequencies and is short-circuited for an even harmonic frequencies, is connected to the drain terminal, the time waveform of the drain voltage V.sub.d becomes a square wave which is represented by the fundamental waveform and the odd harmonic frequency component. The time waveform of the drain current i.sub.d then becomes a periodic half-wave which is represented by the fundamental wave and the even harmonic component. Therefore, when the drain current i.sub.d is passing, the drain volta V.sub.d becomes zero. Conversely, when the drain voltage is not zero, the drain current i.sub.d is not being passed. This makes the power consumption between the drain and the source zero, to thereby increase the power efficiency.
The power efficiency .eta. of a power amplifier can be expressed by the ratio of the high frequency output power P.sub.RFout against the input DC power P.sub.DC inputted between the drain and the source. If expressed in percentage, the relation holds as below. EQU =(P.sub.RFout /P.sub.DC).times.100 EQU =((P.sub.DC -P.sub.diss)/P.sub.dC).times.100
Where P.sub.diss is the power consumed by the power amplifier. If P.sub.diss is made zero, the power efficiency .eta. becomes 100%.
FIG. 11 is a block diagram to show an example of an ideal construction of a prior art class-F amplifier wherein a signal input at an input terminal 81 from a input transmission line is supplied to a gate terminal of a FET 85 via an input matching circuit 84. The source terminal S of the FET 85 is grounded, and the output signal is transmitted from a drain terminal D to an output terminal 82 via an output matching circuit 86 and then to be outputted to the output transmission line. An even harmonic terminating circuit 88 is connected to the drain terminal D of the FET 85 in the class-F amplifier.
The input matching circuit 84 is a circuit for impedance transformation, and realizes impedance matching between the output impedance of the input transmission line and the input impedance of the FET 85 for an input signal of the fundamental frequency f.sub.0. The output matching circuit 86 is also a circuit for impedance transformation, but it realizes the impedance matching between the output impedance of the FET 85 and the impedance of the output transmission line at the fundamental frequency f.sub.0. The output matching circuit 86 is designed to have a high impedance for the harmonic frequency. The even harmonic terminating circuit 88 has impedance characteristics which make the circuit an open circuit for the fundamental frequency and the odd harmonic frequency but short-circuited for the even harmonic frequency. The input matching circuits are typically passive L-C circuits. Therefore, the impedance frequency characteristics of the load at the output (drain) of the FET 85 are such that the impedance becomes matched at the fundamental frequency, short-circuited at the even harmonic frequencies and open at the odd harmonic frequencies.
However, it is very difficult to realize a circuit which is perfectly open for the fundamental frequency and the odd harmonic frequencies but is perfectly short-circuited for all the even harmonic frequencies. The circuit is therefore usually constructed so as to be substantially short-circuited only for the second harmonic frequency, which has the largest power of all the even harmonic frequencies, and the even harmonic frequencies of the fourth or higher degrees are generally ignored. Since the odd harmonic frequencies are terminated to a high impedance, the even harmonic frequencies of the fourth or higher degrees are also frequently loaded with a high impedance. These circuits could provide a practically sufficient efficiency.
FIG. 13 shows a specific example of circuit structure of a prior art class-F amplifier using a FET. The same component parts are denoted with the same reference numerals as in FIG. 11.
The FET 85 is shown modeled as a FET device which is an ideal active device, and a reactance which is caused by wire-bonding, package characteristics, etc. and impedance of the chip itself. FIG. 13 shows an equivalent circuit of the impedance as a reactance circuit 96 with inductance L and capacitance C. In the statement below, three terminals of a practical device, FET 85, are referred to as a gate terminal, a drain terminal and a source terminal while those for an ideal FET are referred to simply as a gate, a drain and a source.
The gate terminal of FET 85 is supplied with a gate bias from a gate voltage supply terminal 91 via a choke coil 93g and an input matching circuit 84. The drain terminal of the FET 85 is supplied with a drain bias from a drain voltage V.sub.d supply terminal 92 via a choke coil 93d. Condensers 94i and 94o are inserted respectively between the input terminal 81 and the input matching circuit 84 and between the output matching circuit 86 and the output terminal 82 in order to block direct current.
A second harmonic terminating circuit 95 comprises a series resonance circuit with inductance L and capacitance C so as to make the input impedance high at the fundamental frequency f.sub.0 and short-circuited at the second harmonic frequency.
The output matching circuit 86 is a low-pass filter with inductance L and capacitance C and is designed to match the output transmission line with the input impedance of the FET 85 at the fundamental frequency and to have a high input impedance at the second harmonic frequency.
However, when a class-F amplifier for a high frequency band is realized with a FET device, the impedance which is shown by the reactance circuit 96 exists not only at the fundamental frequency but also at the second harmonic frequency. When viewed from an ideal FET drain, the load impedance is a combination of the two impedances of the second harmonic terminating circuit 95 and of the reactance circuit 96 at the second harmonic frequency. Therefore, even if the second harmonic terminating circuit resonates at the second harmonic frequency, the load when viewed from the drain is not usually short-circuited at the resonating impedance, and it is very difficult to realize the expected power efficiency.
This problem arises when the constant reactance of the reactance circuit 96 is too large to be ignored compared to the constant value of the second harmonic terminating circuit 95. In other words, the problem becomes more conspicuous as the frequency raises or when the physical chip size of the FET 85 is so large that various types of stray capacitance and inductance become large such as in a high power output transistor. Therefore, when a prior art class-F amplifier is configured as shown in FIG. 13, the theoretically high efficiency of the class-F amplifier cannot fully be realized in the high frequency band.
This invention aims to provide a high-frequency amplifier with a high power efficiency at harmonic frequencies which is not affected by various type of stray reactance caused by the structure of the active devices or by the packaging configuration.